Floating gate memory-based monolayer MoS2 transistor with metal nanocrystals embedded in the gate dielectrics

Jingli Wang; Xuming Zou; Xiangheng Xiao; Lei Xu; Chunlan Wang; Changzhong Jiang; Johnny C. Ho; Ti Wang; Jinchai Li; Lei Liao

doi:10.1002/smll.201401872

Floating gate memory-based monolayer MoS₂ transistor with metal nanocrystals embedded in the gate dielectrics

Jingli Wang
, Xuming Zou
, Xiangheng Xiao
, Lei Xu
, Chunlan Wang
, Changzhong Jiang
, Johnny C. Ho^*
, Ti Wang
, Jinchai Li
, Lei Liao

^*Corresponding author for this work

Wuhan University
City University of Hong Kong

Research output: Contribution to journal › Article › peer-review

121 Scopus citations

Abstract

Charge trapping layers are formed from different metallic nanocrystals in MoS₂-based nanocrystal floating gate memory cells in a process compatible with existing fabrication technologies. The memory cells with Au nanocrystals exhibit impressive performance with a large memory window of 10 V, a high program/erase ratio of approximately 10⁵ and a long retention time of 10 years.

Original language	English
Pages (from-to)	208-213
Number of pages	6
Journal	Small
Volume	11
Issue number	2
DOIs	https://doi.org/10.1002/smll.201401872
State	Published - 14 Jan 2015
Externally published	Yes

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10.1002/smll.201401872

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title = "Floating gate memory-based monolayer MoS2 transistor with metal nanocrystals embedded in the gate dielectrics",

abstract = "Charge trapping layers are formed from different metallic nanocrystals in MoS2-based nanocrystal floating gate memory cells in a process compatible with existing fabrication technologies. The memory cells with Au nanocrystals exhibit impressive performance with a large memory window of 10 V, a high program/erase ratio of approximately 105 and a long retention time of 10 years.",

author = "Jingli Wang and Xuming Zou and Xiangheng Xiao and Lei Xu and Chunlan Wang and Changzhong Jiang and Ho, \{Johnny C.\} and Ti Wang and Jinchai Li and Lei Liao",

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doi = "10.1002/smll.201401872",

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AU - Wang, Jingli

AU - Zou, Xuming

AU - Xiao, Xiangheng

AU - Xu, Lei

AU - Wang, Chunlan

AU - Jiang, Changzhong

AU - Ho, Johnny C.

AU - Wang, Ti

AU - Li, Jinchai

AU - Liao, Lei

PY - 2015/1/14

Y1 - 2015/1/14

N2 - Charge trapping layers are formed from different metallic nanocrystals in MoS2-based nanocrystal floating gate memory cells in a process compatible with existing fabrication technologies. The memory cells with Au nanocrystals exhibit impressive performance with a large memory window of 10 V, a high program/erase ratio of approximately 105 and a long retention time of 10 years.

AB - Charge trapping layers are formed from different metallic nanocrystals in MoS2-based nanocrystal floating gate memory cells in a process compatible with existing fabrication technologies. The memory cells with Au nanocrystals exhibit impressive performance with a large memory window of 10 V, a high program/erase ratio of approximately 105 and a long retention time of 10 years.

UR - https://www.scopus.com/pages/publications/84920692692

U2 - 10.1002/smll.201401872

DO - 10.1002/smll.201401872

M3 - 文章

AN - SCOPUS:84920692692

SN - 1613-6810

VL - 11

SP - 208

EP - 213

JO - Small

JF - Small

IS - 2

ER -

Floating gate memory-based monolayer MoS₂ transistor with metal nanocrystals embedded in the gate dielectrics

Abstract

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