Analytical Model and Planar Magnetic Solution for Parallelization Surges in Switched-Capacitor and Series/Parallel Multilevel Circuits

Cascaded multilevel converters are pivotal in various applications, including offshore wind energy, power transmission, large drives, or reconfigurable battery systems. Enabling parallel connectivity in these converters enhances their scalability and flexibility and introduces features such as sensorless voltage balancing and reduced source impedance. Nonetheless, parallelization comes with challenges in managing current surges in the presence of significant voltage differences between modules and/or low inter-module impedance. Previous research primarily examined the energy loss during this process, assuming parallelization intervals significantly longer than the time required for energy exchange. However, we found the oscillatory balancing dynamics between parallelized modules and switching can interact. This article characterizes paralleling dynamics with a generalized analytical model. This model covers both scenarios where the switching and equilibrium are independent or interacting. Additionally, we introduce a compact module interconnection with engineered inductance to suppress the parallelization current surge. We validated our analytical model and tested the current surge mitigation on an experimental prototype. The practical implementation of the module interconnection with engineered differential-mode inductance reduced the current surge by 86.5% and the voltage overshoot by 42%, which consequently enhance the system efficiency by 2.2%.