Image Super-Resolution and FPGA Hardware Design

Super-resolution (SR) reconstruction technology refers to restoring a given low-resolution image to a corre-sponding high-resolution image through a specific method. This article proposes an FPGA-based image super-resolution method that reduces system runtime and computational resource usage while maintaining high-quality images. In terms of software implementation, this project uses a Resnet-based model and an SR Generative Adversarial Network (SRGAN) model for experiments. In hardware implementation, Squeeze and Excitation SR (SESR) is adopted and this project calls the Zynq DPU to generate a bit stream to cover the Field Programmable Gates Arrays(FPGA) and deploy the SR neural network model on the FPGA. The hardware platform used in this article is Ultra96V2. With optimized algorithm and model training and hardware compilation, the PSNR and SSIM of the software and hardware system can achieve considerable performance in power consumption.