Joint variable partitioning and bank selection instruction optimization on embedded systems with multiple memory banks

Tiantian Liu; Minming Li; Chun Jason Xue

doi:10.1109/ASPDAC.2010.5419909

Joint variable partitioning and bank selection instruction optimization on embedded systems with multiple memory banks

Tiantian Liu^*
, Minming Li
, Chun Jason Xue

^*此作品的通讯作者

City University of Hong Kong

科研成果: 书/报告/会议事项章节 › 会议稿件 › 同行评审

5 引用（Scopus）

摘要

Multiple memory banks with bank switching is a technique to increase memory size without extending address buses. A special instruction, Bank Selection Instruction (BSL) is inserted into the original programs to modify the bank register to point to the right bank, which increases both the code size and runtime overhead. In this paper, we carefully partition variables into different banks and insert BSLs at different positions so that the overheads can be minimized. Minimizing code size and minimizing runtime overhead are two objectives investigated in this paper. Experiments show that the algorithms proposed can reduce the overhead caused by BSLs efficiently.

源语言	英语
主期刊名	2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010
页	113-118
页数	6
DOI	https://doi.org/10.1109/ASPDAC.2010.5419909
出版状态	已出版 - 2010
已对外发布	是
活动	2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010 - Taipei, 中国台湾期限: 18 1月 2010 → 21 1月 2010

出版系列

姓名	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

会议

会议	2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010
国家/地区	中国台湾
市	Taipei
时期	18/01/10 → 21/01/10

访问文件

10.1109/ASPDAC.2010.5419909

其它文件与链接

链接到 Scopus 的出版物

引用此

Liu, T., Li, M., & Xue, C. J. (2010). Joint variable partitioning and bank selection instruction optimization on embedded systems with multiple memory banks. 在 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010 (页码 113-118). 文章 5419909 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2010.5419909

@inproceedings{7a365c9d8efa4c12a81de20bd5371003,

title = "Joint variable partitioning and bank selection instruction optimization on embedded systems with multiple memory banks",

abstract = "Multiple memory banks with bank switching is a technique to increase memory size without extending address buses. A special instruction, Bank Selection Instruction (BSL) is inserted into the original programs to modify the bank register to point to the right bank, which increases both the code size and runtime overhead. In this paper, we carefully partition variables into different banks and insert BSLs at different positions so that the overheads can be minimized. Minimizing code size and minimizing runtime overhead are two objectives investigated in this paper. Experiments show that the algorithms proposed can reduce the overhead caused by BSLs efficiently.",

author = "Tiantian Liu and Minming Li and Xue, \{Chun Jason\}",

year = "2010",

doi = "10.1109/ASPDAC.2010.5419909",

language = "英语",

isbn = "9781424457656",

series = "Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC",

pages = "113--118",

booktitle = "2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010",

note = "2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010 ; Conference date: 18-01-2010 Through 21-01-2010",

}

Liu, T, Li, M & Xue, CJ 2010, Joint variable partitioning and bank selection instruction optimization on embedded systems with multiple memory banks. 在 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010., 5419909, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 页码 113-118, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010, Taipei, 中国台湾, 18/01/10. https://doi.org/10.1109/ASPDAC.2010.5419909

Joint variable partitioning and bank selection instruction optimization on embedded systems with multiple memory banks. / Liu, Tiantian; Li, Minming; Xue, Chun Jason.
2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. 2010. 页码 113-118 5419909 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

科研成果: 书/报告/会议事项章节 › 会议稿件 › 同行评审

TY - GEN

T1 - Joint variable partitioning and bank selection instruction optimization on embedded systems with multiple memory banks

AU - Liu, Tiantian

AU - Li, Minming

AU - Xue, Chun Jason

PY - 2010

Y1 - 2010

N2 - Multiple memory banks with bank switching is a technique to increase memory size without extending address buses. A special instruction, Bank Selection Instruction (BSL) is inserted into the original programs to modify the bank register to point to the right bank, which increases both the code size and runtime overhead. In this paper, we carefully partition variables into different banks and insert BSLs at different positions so that the overheads can be minimized. Minimizing code size and minimizing runtime overhead are two objectives investigated in this paper. Experiments show that the algorithms proposed can reduce the overhead caused by BSLs efficiently.

AB - Multiple memory banks with bank switching is a technique to increase memory size without extending address buses. A special instruction, Bank Selection Instruction (BSL) is inserted into the original programs to modify the bank register to point to the right bank, which increases both the code size and runtime overhead. In this paper, we carefully partition variables into different banks and insert BSLs at different positions so that the overheads can be minimized. Minimizing code size and minimizing runtime overhead are two objectives investigated in this paper. Experiments show that the algorithms proposed can reduce the overhead caused by BSLs efficiently.

UR - https://www.scopus.com/pages/publications/77951227851

U2 - 10.1109/ASPDAC.2010.5419909

DO - 10.1109/ASPDAC.2010.5419909

M3 - 会议稿件

AN - SCOPUS:77951227851

SN - 9781424457656

T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

SP - 113

EP - 118

BT - 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010

T2 - 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010

Y2 - 18 January 2010 through 21 January 2010

ER -

Joint variable partitioning and bank selection instruction optimization on embedded systems with multiple memory banks

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会议

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